Assigning Meaning to Form

Complex critical systems need to be formally described and analysed (i.e., engineered). Many different formal methods have been developed for analysing almost all aspects of these systems and in certain cases even synthesising parts of these systems themselves through, e.g., controller synthesis. In many cases however, it is not at all obvious what the results of the tools developed for these methods really mean and practitioners can spend a considerable time trying to understand the results, such as a scheduling created by a compiler for a synchronous language or a timed-automata based controller for a real-time system. This situation decreases not only the use itself of these tools and the corresponding formal methods but also hinders the ability of the practitioners to understand, optimise and validate their systems.